With the development of flat panel display technology, a display device with high resolution and narrow bezel has become the trend of development, and integrating a gate driving circuit on a display panel is an important solution to realize the display device with high resolution and narrow bezel.
FIG. 1 is a circuit diagram of a shift register in the prior art, and FIG. 2 is a timing diagram of signals of the shift register shown in FIG. 1. As shown in FIG. 1, the shift register comprises: a precharge transistor T100, a reset transistor T200, a pull-up transistor T300, a pull-down transistor T400 and a bootstrap capacitor C100, wherein a connection point where the bootstrap capacitor C100 and the pull-up transistor T300 are connected is a first node PU1, a start signal STV is input via a start signal input terminal connected to a gate of the precharge transistor T100, a reset signal RESET is input via a reset signal input terminal connected to a gate of the reset transistor T200, a output signal OUTPUT is output via a output terminal of the shift register, VGH represents a high-level voltage, and VGL represents a low-level voltage.
A thin film transistor (TFT) made of a-si (amorphous silicon) or p-si (polycrystalline silicon) is an enhancement-mode TFT. When the enhancement-mode TFTs are applied in the above shift register circuit, the shift register shown in FIG. 1 can operate normally (as indicated by the solid line in FIG. 2).
Recently, an oxide thin film transistor, as a promising semiconductor technology, has simpler manufacturing process and lower cost compared to a TFT made of p-si, and has higher mobility compared to a TFT made of a-si, therefore, it has drawn more and more attention, and is likely to be the mainstream backplane driving technique for various display panels, particularly for OLED (organic light-emitting diode) display panels and flexible display panels. However, the oxide TFT has characteristics of depletion-mode TFT, and when the depletion-mode oxide TFTs are applied directly in the shift register shown in FIG. 1, the shift register cannot operate normally (as indicated by the dotted line in FIG. 2). The reason why the shift register shown in FIG. 1 cannot operate normally due to the depletion mode-oxide TFTs will be explained below in conjunction with the drawings.
FIG. 3 illustrates a characteristic curve of an enhancement-mode TFT, and FIG. 4 illustrates a characteristic curve of a depletion-mode TFT. In FIGS. 3 and 4, vertical axis represents drain current iD of the TFT, and lateral axis represents gate-source voltage vGS. It can be seen from FIG. 3 that the drain current iD is zero when the gate-source voltage vGS is zero, which indicates that the enhancement-mode TFT is completely cut off when the gate-source voltage is zero. It can also be seen from FIG. 4 that, the drain current iD is much greater than zero when the gate-source voltage vGS is zero, and the drain current iD is zero only when the gate-source voltage vGS is a certain negative voltage, which indicates that the depletion-mode TFT can be completely cut off only when the gate-source voltage vGS is a certain negative voltage.
If depletion-mode TFTs are adopted as the precharge transistor T100 and the reset transistor T200, when the shift register is in a pull-up stage, the first node PU1 may discharge through the precharge transistor T100 and the reset transistor T200, resulting in a voltage drop at the first node PU1, which makes the shift register unable to output normally (as indicated by the dotted line in FIG. 2), thus disabling the driving function of the gate driving circuit.